Kc89c72 Datasheet |best| Access

Due to its exact pinout and software compatibility with the AY-3-8910, the KC89C72 has been used in a variety of legacy systems and specialized hardware:

| Pin | Name | Type | Description | | :--- | :--- | :--- | :--- | | 1 | DA7 | I | Data bus bit 7 (MSB) | | 2 | DA6 | I | Data bus bit 6 | | 3 | DA5 | I | Data bus bit 5 | | 4 | DA4 | I | Data bus bit 4 | | 5 | DA3 | I | Data bus bit 3 | | 6 | DA2 | I | Data bus bit 2 | | 7 | DA1 | I | Data bus bit 1 | | 8 | DA0 | I | Data bus bit 0 (LSB) | | 9 | /BDIR | I | Bus Direction (Control) | | 10 | /BC2 | I | Bus Control 2 | | 11 | /BC1 | I | Bus Control 1 | | 12 | Vss | Power | Ground (0V) | | 13 | CLOCK | I | Master Clock Input (Typically 1-2 MHz) | | 14 | /RESET | I | Low-Active Reset | | 15 | A8 | I | Address Line (used for register vs. data select) | | 16 | TEST1 | - | Factory test pin; tie to Vss normally | | 17 | TEST2 | - | Factory test pin; tie to Vss | | 18 | ANO | O | Analog noise output (rarely used – tie to Vss) | | 19 | ENO | O | Envelope generator output (digital monitor) | | 20 | CHB | O | Channel B square wave (before D/A) | | 21 | CHC | O | Channel C square wave | | 22 | CHA | O | Channel A square wave | | 23 | NC | - | No connection | | 24 | Vdd | Power | +5V | | 25 | /IOA | O | I/O Port A (not implemented, tie high via resistor) | | 26 | /IOB | O | I/O Port B (not implemented, tie high) | | 27 | DAC | O | Analog output (use external resistor network) | | 28 | REF | I | Reference voltage for D/A (usually Vdd/2 via divider) | kc89c72 datasheet

Since the original is missing, use these resources: Due to its exact pinout and software compatibility